Modern computers employ virtual memory to decouple processes from the physical memory addresses backing the address space of the processes. Using virtual memory enables processes to have a large contiguous address space, and allows the computer to run more processes than can fit simultaneously in their entirety in the available physical memory (i.e., to “over-commit” memory). To do this, virtual memory space is divided into pages of a fixed size, typically 4 kB, 2 MB, or 1 GB, and each page of the virtual memory space either maps onto a page within the physical memory of the same page size or it maps to nothing.
Translation of a virtual memory address to a physical memory address is done by traversing page tables in RAM that contain mapping information. To speed up translation, a TLB (translation lookaside buffer) is typically used. The TLB provides faster translation of virtual addresses to physical addresses than does accessing page tables in RAM because the TLB can provide the beginning-to-end mapping in a single step, and because the TLB can be implemented in a small (and, therefore, fast to access) data structure closer to or in the CPU itself. However, the TLB is limited in size and often a virtual memory page cannot be found in the TLB. Whenever this happens, a “TLB miss” occurs, and the mapping has to be performed by a traversal of the page tables, commonly known as a “page walk,” a much slower process than look-ups in the TLB.
Use of large pages reduces the number of TLB misses and generally improves performance of virtual memory systems. However, the use of large pages also generally reduces the ability of an operating system to efficiently utilize the physical memory. Since large pages pose this inherent tradeoff between fast memory access and efficient utilization of physical memory, large pages are not typically used universally. Therefore, it is important to optimize their use and deploy them in places where they will deliver the biggest performance improvement.